Journal Article 4H-SiC Pseudo-CMOS Logic Inverters for Harsh Environment Electronics

Shin-ichiro, Kuroki  ,  Kurose, T.  ,  Nagatsuma, H.  ,  Ishikawa, S.  ,  Maeda, T.  ,  Sezaki, H.  ,  Kikkawa, T.  ,  Makino, T.  ,  Ohshima, T.  ,  Ostling, M.  ,  C.-M., Zetterling

897pp.669 - 672 , 2017-02
Summary form only given. The complete presentation was not made available for publication as part of the conference proceedings. For logic gate with higher voltage swing, 4H-SiC pseudo-CMOS logic inverter with four nMOS was suggested and demonstrated, and a high voltage swing of 4.4 V was achieved at VDD=5 V. Simple nMOS inverters were also investigated. Both of pseudo-CMOS and nMOS inverters were operated at a high temperature of 200°C. For future SiC large integrated circuits, junction leakage current between n+ regions were also investigated with the comb-shaped test elements.

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