Thesis or Dissertation Design and Evaluation of an FPGA-based Query Accelerator for Data Streams

オゲ, ヤースィン  ,  オゲ, ヤースィン  ,  Oge, Yasin

pp.1 - 83 , 2016-03-25 , The University of Electro-Communications
An important and growing class of applications requires to process online data streams on the fly in order to identify emerging trends in a timely manner. Data Stream Management Systems (DSMSs) deal with potentially infinite streams of data that should be processed for real-time applications, executing SQL-like continuous queries over data streams. In order to deliver real-time response for high-volume applications, there is currently a great deal of interest in the potential of using field-programmable gate arrays (FPGAs) as custom accelerators for continuous query processing over data streams. One of the previous studies focuses on sliding-window aggregate queries and shows how these queries can be implemented on an FPGA. Nevertheless, there still remain three practical issues related to the implementation of sliding-window aggregation. The first issue is that it is necessary to consider out-of-order arrival of tuples at a windowing operator. To address the issue, this work presents an order- agnostic implementation of a sliding-window aggregate query on an FPGA. The second issue is that a large number of overlapping sliding-windows cause severe scalability problems in terms of both perfor- mance and area. Instead of replicating a large number of aggregation modules, each sliding window is divided into non-overlapping sub-windows called panes. Results obtained in this work indicate that the pane-based approach can provide significant benefits in terms of performance (i.e., the maximum allow- able clock frequency), area (i.e., the hardware resource usage), and scalability. Finally, the third issue is that there is a lack of run-time configurability, which severely limits the practical use in a wide range of applications. To address the problem, the present study proposes a novel query accelerator, namely Configurable Query Processing Hardware (CQPH). CQPH is an FPGA-based query processor that con- tains a collection of configurable hardware modules, especially designed for sliding-window aggregate queries. As a proof of concept, a prototype of CQPH is implemented on an FPGA platform for a case study. Evaluation results indicate that the prototype implementation of CQPH with a Gigabit Ethernet interface can process a packet stream at wire-speed without packet loss. Since the Gigabit Ethernet is not sufficient to saturate the CQPH, a DDR3 SDRAM module is used as a high-speed data source. Results indicate that the prototype of CQPH can execute multiple queries simultaneously without sacrificing the performance (i.e., throughput) even if the data rate reached more than 10 Gbps.

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