学術雑誌論文 A Field Programmable Sequencer and Memory with Middle Grained Programmability Optimized for MCU Peripherals

Kawamura, Yoshifumi  ,  Okada, Naoya  ,  Matsuda, Yoshio  ,  Matsumura, Tetsuya  ,  Makino, Hiroshi  ,  Arimoto, Kazutami

E99 ( 5 )  , pp.917 - 928 , 2016-05 , IEICE 電子情報通信学会
ISSN:0916-8508
NII書誌ID(NCID):AA10826239
内容記述
A Field Programmable Sequencer and Memory (FPSM), which is a programmable unit exclusively optimized for peripherals on a micro controller unit, is proposed. The FPSM functions as not only the peripherals but also the standard built-in memory. The FPSM provides easier programmability with a smaller area overhead, especially when compared with the FPGA. The FPSM is implemented on the FPGA and the programmability and performance for basic peripherals such as the 8 bit counter and 8 bit accuracy Pulse Width Modulation are emulated on the FPGA. Furthermore, the FPSM core with a 4K bit SRAM is fabricated in 0.18µm 5 metal CMOS process technology. The FPSM is an half the area of FPGA, its power consumption is less than one-fifth.
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http://dspace.lib.kanazawa-u.ac.jp/dspace/bitstream/2297/45918/1/FPSM_Paper_rev.pdf

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